• DocumentCode
    2655130
  • Title

    A cell and macrocell compiler for GaAs VLSI full-custom design

  • Author

    Montiel-Nelson, J.A. ; de Armas, V. ; Sarmiento, R. ; Núñez, A.

  • Author_Institution
    Univ. of Las Palmas de Gran Canaria, Spain
  • fYear
    1998
  • fDate
    23-26 Feb 1998
  • Firstpage
    947
  • Lastpage
    948
  • Abstract
    A gallium arsenide automated layout generation system (OLYMPO) for SSI, MSI and LSI circuits used in GaAs VLSI design has been developed. We introduce a full-custom layout style, called RN-based cell model, that it is suited to generate low self-inductance circuit layouts of cells and macrocells. The cell compiler can be used as a cell library builder and it is embedded in a random logic macrocell and an iterative logic array generator. Experimental results demonstrate that OLYMPO generates complex and compact layouts and the synthesis process can be interactively used at the system design level
  • Keywords
    III-V semiconductors; VLSI; application specific integrated circuits; circuit layout CAD; gallium arsenide; integrated circuit layout; GaAs; GaAs VLSI full-custom design; LSI circuits; MSI circuits; OLYMPO; RN-based cell model; SSI circuits; automated layout generation system; cell compiler; cell library builder; full-custom layout style; iterative logic array generator; low self-inductance circuit layouts; macrocell compiler; random logic macrocell; Circuits; Finite impulse response filter; Gallium arsenide; Large scale integration; Logic arrays; Macrocell networks; Power supplies; Rails; Routing; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation and Test in Europe, 1998., Proceedings
  • Conference_Location
    Paris
  • Print_ISBN
    0-8186-8359-7
  • Type

    conf

  • DOI
    10.1109/DATE.1998.655982
  • Filename
    655982