Title :
A low power high date rate ASK IF receiver
Author :
Wang, Xiaoman ; Chi, Baoyong ; Wang, ZhiHua
Author_Institution :
Inst. of Microelectron., Tsinghua Univ., Beijing, China
Abstract :
A low power high data rate ASK IF receiver is proposed. It consists of one digital-control AGC loop and an ASK detector. By utilizing the scrambler concept in the digital communication systems, the gain of PGA in the AGC loop is adjusted discretely by a gain control block to eliminate the multi-digit A/D converter. The ASK IF receiver has been implemented in 0.18 ¿m CMOS and the overall power consumption is 2.175 mW with a supply voltage of 1.8V. The operating frequency is 10M, and the data rate is 2 Mbps. The amplitude of detectable input signal can range from 5 ¿V to 900 mV.
Keywords :
CMOS digital integrated circuits; amplitude shift keying; analogue-digital conversion; digital radio; low-power electronics; radio receivers; ASK detector; CMOS; digital communication systems; digital-control AGC loop; gain control; low power high date rate ASK IF receiver; multidigit A/D converter; power 2.175 mW; size 0.18 mum; voltage 1.8 V; Amplitude shift keying; Circuits; Demodulation; Detectors; Digital communication; Electronics packaging; Gain control; Low pass filters; Microelectronics; Signal detection; AGC; ASK demodulator; CMOS; Low power;
Conference_Titel :
ASIC, 2009. ASICON '09. IEEE 8th International Conference on
Conference_Location :
Changsha, Hunan
Print_ISBN :
978-1-4244-3868-6
Electronic_ISBN :
978-1-4244-3870-9
DOI :
10.1109/ASICON.2009.5351621
