DocumentCode
2657192
Title
A novel SiGe-On-Insulator IMOS device with reduced bias voltages
Author
Nematian, Hamed ; Fathipour, Morteza ; Hajghasem, Hassan S. ; Farbiz, Farzan
Author_Institution
Univ. of Tehran, Tehran
fYear
2007
fDate
12-14 Dec. 2007
Firstpage
1
Lastpage
2
Abstract
In this paper we have investigated the possibility of implanting SiGe-on-insulator technology to reduce the breakdown voltage in an p-IMOS device. Of course the concept can be extended to n-IMOS devices as well. The structure of the proposed SGOI-IMOS is shown and the parameters employed in simulation are listed in table 1.
Keywords
Ge-Si alloys; MOSFET; semiconductor device breakdown; silicon-on-insulator; SGOI-IMOS; SiGe; SiGe-on-insulator technology; breakdown voltage; n-IMOS devices; p-IMOS device; reduced bias voltages; Breakdown voltage; Educational institutions; Germanium; Impact ionization; Low voltage; MOSFET circuits; Photonic band gap; Temperature; Threshold voltage; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Device Research Symposium, 2007 International
Conference_Location
College Park, MD
Print_ISBN
978-1-4244-1892-3
Electronic_ISBN
978-1-4244-1892-3
Type
conf
DOI
10.1109/ISDRS.2007.4422284
Filename
4422284
Link To Document