DocumentCode
2657209
Title
Enhanced chip/package design for the IBM ES/9000
Author
Belanger, R.S. ; Conrady, D.P. ; Honsinger, P.S. ; Lavery, T.J. ; Rothman, S.J. ; Schanzenback, E.C. ; Sitaram, D. ; Selinger, C.R. ; DuBois, R.E. ; Mahoney, G.W. ; Miceli, G.F.
Author_Institution
IBM Gen. Technol. Div., East Fishkill, NY, USA
fYear
1991
fDate
14-16 Oct 1991
Firstpage
544
Lastpage
549
Abstract
The automatic placement and wiring programs used for design of the gate array bipolar chips, the TCM logical design optimization for timing, and the automated module wiring programs of the ES/9000 machines are described. An overview of related aspects of the chip and module technologies is given
Keywords
IBM computers; bipolar integrated circuits; logic arrays; mainframes; packaging; IBM ES/9000; TCM logical design optimization; automated module wiring programs; automatic placement; chip/package design; gate array bipolar chips; timing; wiring programs; Books; Circuits; Delay estimation; Design optimization; Libraries; Packaging; Programmable logic arrays; Timing; Wire; Wiring;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Design: VLSI in Computers and Processors, 1991. ICCD '91. Proceedings, 1991 IEEE International Conference on
Conference_Location
Cambridge, MA
Print_ISBN
0-8186-2270-9
Type
conf
DOI
10.1109/ICCD.1991.139969
Filename
139969
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