Fin flash memory cells with separated double gates

4-bit/cell devices have been studied to increase the flash memory density using multi-bit operation [1] or both multi-bit and multi-level concepts at the same time [2]. Moreover, physically isolated two charge storage nodes combined with the non-conductive charge trapping layers give an opportunity to achieve even 8-bit/cell operation [3]. In this paper, separated double-gate fin flash memory devices with multi-bit and multi-level operation are investigated. Four different operation modes are introduced for this cell and their operation is demonstrated with the 3-D device simulation