A novel design assistant for analog circuits

Author

Wolf, Markus ; Kleine, Ulrich ; Schafer, Frédéric

Author_Institution

Inst. for Meas. Technol. & Electron., Otto-von-Guericke Univ. of Magdeburg, Germany

fYear

1998

fDate

10-13 Feb 1998

Firstpage

495

Lastpage

500

Abstract

This paper presents a new design assistant for analog integrated circuits. The interactive tool is implemented in the Design Framework II of Cadence and supports the designer during circuit design. With the help of this new assistant analog designers can create ad hoc layouts of their circuits. These layouts are automatically extracted, and the updated netlist of the circuit is used for further simulation and optimization steps. Thus the optimization is speeded up and the reliability of the design is improved due to the more accurate modeling of the parasitic circuit elements. The use of the design assistant will be demonstrated by various examples

Keywords

analogue integrated circuits; circuit CAD; circuit layout CAD; Cadence; Design Framework II; analog circuits; design assistant; interactive tool; layouts; optimization; reliability; simulation; updated netlist; Analog circuits; Analog integrated circuits; Circuit simulation; Circuit synthesis; Circuit topology; Design optimization; Integrated circuit measurements; Integrated circuit technology; MOSFETs; Phase estimation;

fLanguage

English

Publisher

ieee

Conference_Titel

Design Automation Conference 1998. Proceedings of the ASP-DAC '98. Asia and South Pacific

Conference_Location

Yokohama

Print_ISBN

0-7803-4425-1

Type

conf

DOI

10.1109/ASPDAC.1998.669533

Filename

669533