DocumentCode
2657959
Title
A comparison of redundant CORDIC rotation engines
Author
Harding, John A. ; Lang, Tomas ; Lee, Jeong-A
Author_Institution
Dept. of Comput. Sci., California Univ., Los Angeles, CA, USA
fYear
1991
fDate
14-16 Oct 1991
Firstpage
556
Lastpage
559
Abstract
The CMOS implementation of two high performance rotation processors using redundant CORDIC are reviewed and compared. One of the designs uses a variable scaling factor while the other is with constant scaling. The latter also incorporates some radix-4 CORDIC stages. Characteristics for 1.2 μm CMOS implementations are given
Keywords
CMOS integrated circuits; digital arithmetic; 1.2 micron; CMOS implementation; constant scaling; radix-4; redundant CORDIC rotation engines; variable scaling factor; Algorithm design and analysis; Arithmetic; CMOS process; Computer architecture; Computer science; Difference equations; Engines; Matrix decomposition; Parallel architectures; Throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Design: VLSI in Computers and Processors, 1991. ICCD '91. Proceedings, 1991 IEEE International Conference on
Conference_Location
Cambridge, MA
Print_ISBN
0-8186-2270-9
Type
conf
DOI
10.1109/ICCD.1991.139972
Filename
139972
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