Title :
Integrating TiN only bottom plate metal-insulator metal capacitor (MIMC) for contamination free manufacturing
Author :
Greenwood, B.B. ; Prasad, Jagdish
Author_Institution :
AMI Semicond. Inc., Pocatello
Abstract :
In this work, MIM capacitors are integrated in a high-voltage capable CMOS process flow. MIM capacitors used in this work have MIMC area per die above 3 million mum2/die, thus reliability must be proven at this level to <1 ppm fails for this mode. The electrical requirements for the MIMC are 1.5fF/mum2 capacitance/area, 3.6V maximum operating voltage, and less than 30ppm 1st order voltage coefficient. The capacitor is integrated using 2nd layer metal, a silicon nitride (SiN) dielectric layer, and a special top plate metal (metal 2.5).
Keywords :
CMOS integrated circuits; MIM devices; capacitors; integrated circuit reliability; silicon compounds; titanium compounds; MIM capacitors; MIMC; SiN; TiN; bottom plate; contamination free manufacturing; dielectric layer; high voltage capable CMOS process flow; metal insulator metal capacitor; voltage 3.6 V; CMOS process; Capacitance; Contamination; Dielectrics; MIM capacitors; Manufacturing; Metal-insulator structures; Silicon compounds; Tin; Voltage;
Conference_Titel :
Semiconductor Device Research Symposium, 2007 International
Conference_Location :
College Park, MD
Print_ISBN :
978-1-4244-1892-3
Electronic_ISBN :
978-1-4244-1892-3
DOI :
10.1109/ISDRS.2007.4422363
