DocumentCode
2659215
Title
Reciprocative multirelation arrays
Author
Svarstad, Kjetil
Author_Institution
ELAB-RUNIT, Trondheim, Norway
fYear
1990
fDate
1-3 May 1990
Firstpage
1591
Abstract
A processor array architecture based on a novel dataflow scheme is reported. It is shown that the reciprocative multirelation arrays (RMA) dataflow provides optimal efficiency of processor utilization. An abstract framework is used as a description of the general principle, and different operational units are `plugged´ into the framework to implement different algorithms. Suitable applications are in the area of symbolic computing. Details of an RMA implementation of a sorter are presented, where the advantages are very high processor utilization, simple and localized control, pipelined execution of data sets without any significant control overhead, and a modular and compact design
Keywords
parallel architectures; pipeline processing; symbol manipulation; RMA implementation; control overhead; data sets; dataflow scheme; optimal efficiency; pipelined execution; processor array architecture; reciprocative multirelation arrays; symbolic computing; Costs; Phased arrays; Pipelines; Registers; Sorting; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1990., IEEE International Symposium on
Conference_Location
New Orleans, LA
Type
conf
DOI
10.1109/ISCAS.1990.112440
Filename
112440
Link To Document