The effect of GE mole fraction on the electrical characteristics of nanoscale Si/SiGe heterostructure pMOSFET

In this paper we investigate the impact of Ge mole fraction on the electrical characteristics of SiGe pMOSFET. Simulations are carried out using Dessis 7, from ISE TCAD. The gate length of the simulated device is 150 nm. The dependence of the threshold voltages on the germanium content (x) in the Si/Si_1-xGe_x layer. It is observed that the absolute value of the threshold voltage V_TH decreases as Ge mole fraction is increased. This is due to the increase in the valence band discontinuity at the Si/SiGe heterointerface. Consequently the channel forms at a lower gate voltage. Increasing Ge mole fraction also yields larger |V_TS|. It is preferable to prevent the parallel conduction at SiO₂/Si interface. There are other parameters affecting threshold voltage which are not considered in this paper. Controlling the magnitude of these two threshold voltages is very important in low power applications. As Ge mole fraction is increased, the hole effective mass is decreased. Therefore carrier mobility is increased. This results in an increase in drain current. It is interesting to note that by increasing mole fraction above 0.6 the rate of increase in drain current is reduced.