DocumentCode
2659412
Title
Interleaved Parallel Schemes: improving memory throughput on supercomputers
Author
Seznec, Andre ; Lenfant, Jacques
Author_Institution
IRISA, Campus de Beaulieu, France
fYear
1992
fDate
1992
Firstpage
246
Lastpage
255
Keywords
Bandwidth; Commercialization; Distributed computing; Multiprocessor interconnection networks; Parallel processing; Permission; Registers; Supercomputers; Throughput; Vector processors;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Architecture, 1992. Proceedings., The 19th Annual International Symposium on
Print_ISBN
0-89791-509-7
Type
conf
DOI
10.1109/ISCA.1992.753321
Filename
753321
Link To Document