DocumentCode
2660404
Title
RTOS scheduling in transaction level models
Author
Yu, Haobo ; Gerstlauer, Andreas ; Gajski, Daniel
Author_Institution
Center for Embedded Comput. Syst., California Univ., Irvine, CA, USA
fYear
2003
fDate
1-3 Oct. 2003
Firstpage
31
Lastpage
36
Abstract
Raising the level of abstraction in system design promises to enable faster exploration of the design space at early stages. While scheduling decision for embedded software has great impact on system performance, it´s much desired that the designer can select the right scheduling algorithm at high abstraction levels so as to save him from the error-prone and time consuming task of tuning code delays or task priority assignments at the final stage of system design. In this paper we tackle this problem by introducing a RTOS model and an approach to refine any unscheduled transaction level model (TLM) to a TLM with RTOS scheduling support. The refinement process provides a useful tool to the system designer to quickly evaluate different dynamic scheduling algorithms and make the optimal choice at an early stage of system design.
Keywords
operating systems (computers); real-time systems; scheduling; specification languages; systems analysis; transaction processing; RTOS model; RTOS scheduling support; SpecC SLDL; Superlog; SystemC; abstraction level; design space; embedded software; scheduling algorithm; scheduling refinement tool; system design; transaction level model; tuning code delay; Delay effects; Dynamic scheduling; Embedded computing; Embedded software; Operating systems; Processor scheduling; Real time systems; Scheduling algorithm; System performance; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Hardware/Software Codesign and System Synthesis, 2003. First IEEE/ACM/IFIP International Conference on
Conference_Location
Newport Beach, CA, USA
Print_ISBN
1-58113-742-7
Type
conf
DOI
10.1109/CODESS.2003.1275252
Filename
1275252
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