Title :
An event-driven, alias-free ADC with signal-dependent resolution
Author :
Weltin-Wu, Colin ; Tsividis, Yannis
Author_Institution :
Columbia Univ., New York, NY, USA
Abstract :
A clockless 8b ADC in 130nm CMOS uses a time-varying comparison window to dynamically vary resolution, and input-dependent dynamic bias, to maintain SNDR while saving power. Alias-free operation with SNDR in the range of 47-54dB, which partly exceeds the theoretical limit of 8b conventional converters, is achieved over a 20kHz bandwidth with 3-9μW power from a 0.8V supply.
Keywords :
CMOS integrated circuits; analogue-digital conversion; CMOS; alias-free ADC; alias-free operation; clockless 8b ADC; event-driven ADC; input-dependent dynamic bias; noise figure 47 dB to 54 dB; power 3 muW to 9 muW; signal-dependent resolution; size 130 nm; time-varying comparison window; voltage 0.8 V; CMOS integrated circuits; Clocks; Noise; Power dissipation; Quantization; Signal resolution;
Conference_Titel :
VLSI Circuits (VLSIC), 2012 Symposium on
Conference_Location :
Honolulu, HI
Print_ISBN :
978-1-4673-0848-9
Electronic_ISBN :
978-1-4673-0845-8
DOI :
10.1109/VLSIC.2012.6243773
