Title :
A 0.13µm 8Mb logic based CuxSiyO resistive memory with self-adaptive yield enhancement and operation power reduction
Author :
Xue, X.Y. ; Jian, W.X. ; Yang, J.G. ; Xiao, F.J. ; Chen, G. ; Xu, X.L. ; Xie, Y.F. ; Lin, Y.Y. ; Huang, R. ; Zhou, Q.T. ; Wu, J.G.
Author_Institution :
ASIC & Syst. State Key Lab., Fudan Univ., Shanghai, China
Abstract :
A 0.13μm 8Mb CuxSiyO resistive memory test macro with 20F2 cell size is developed based on logic process for the first time. Smart and adaptive assist write and read circuit are proposed and verified in order to fix yield and power consumption issues from large write speed and high temperature resistance variation. SAWM (self-adaptive write mode) helps to enlarge Roff/Ron window from 8X to 24X at room temperature. The reset bit yield is improved from 61.5% to 100% and large power consumption is eliminated after set success. SARM (Self-adaptive read mode) improves read bit yield from 98% to 100% at 125°C. The typical access time of on-pitch voltage sensing SA(sense amplifier) is 21ns and high bandwidth throughput is supported.
Keywords :
amplifiers; copper compounds; integrated logic circuits; random-access storage; silicon compounds; CuxSiyO; RRAM; SARM; SAWM; high temperature resistance variation; logic based resistive memory; logic process; on-pitch voltage sensing sense amplifier; operation power reduction; power consumption; read circuit; self-adaptive read mode; self-adaptive write mode; self-adaptive yield enhancement; size 0.13 mum; storage capacity 8 Mbit; temperature 125 degC; temperature 293 K to 298 K; time 21 ns; write circuit; write speed; Arrays; Generators; Power demand; Resistance; Temperature measurement; Temperature sensors; RRAM; SARM; SAWM; on-pitch SA; yield;
Conference_Titel :
VLSI Circuits (VLSIC), 2012 Symposium on
Conference_Location :
Honolulu, HI
Print_ISBN :
978-1-4673-0848-9
Electronic_ISBN :
978-1-4673-0845-8
DOI :
10.1109/VLSIC.2012.6243780
