Reed-Solomon codes based novel signature analysis technique for VLSI random access memory testing

A signature analysis technique which analyzes the aliasing probabilities of multi-input signature registers (MISRs) is presented. An error model is developed on the assumption that in each time slot error symbols occur uniformly and independently. The aliasing probabilities of multi-input signature registers are analyzed using the weight distributions of maximum distance separable codes. The circuit under test is a random-access memory chip. The analysis shows that aliasing probabilities of multi-input signature registers are exactly the same for both nonprimitive and primitive polynomials that define the multi-input signature registers. This implies that aliasing probabilities do not depend on the polynomials that define the multi-input signature registers. It is shown that for given test lengths n and n´, where n<n´, aliasing probability Pal(n) is less than aliasing probability Pal(n´). The aliasing probabilities of multiplexed multi-input signature registers are also analyzed using the maximum distance-separable Reed-Solomon codes