DocumentCode
2661626
Title
Characterization of latch-up in CMOS inverters in pulsed electromagnetic interference environments
Author
Kim, Kyechong ; Iliadis, Agis A.
Author_Institution
Univ. of Maryland, College Park
fYear
2007
fDate
12-14 Dec. 2007
Firstpage
1
Lastpage
2
Abstract
Latch-up effects in cascaded CMOS inverters due to pulsed electromagnetic interference (PEMI) from high power microwave sources, is reported. The cascaded inverters were designed and fabricated consisting of two identical inverters with a width to length ratio (W/L) of 3.2 mum/1.6 mum for n MOSFETs and 9.6 mum/1.6mum for p MOSFETs. The inverters were packaged and placed in a PC board for measurements.
Keywords
CMOS integrated circuits; MOSFET; electromagnetic interference; invertors; MOSFET; PC board; cascaded CMOS inverters; latch-up; power microwave sources; pulsed electromagnetic interference; EMP radiation effects; Electromagnetic interference; Frequency; Microwave devices; Microwave measurements; Pulse amplifiers; Pulse generation; Pulse inverters; Pulse measurements; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Device Research Symposium, 2007 International
Conference_Location
College Park, MD
Print_ISBN
978-1-4244-1892-3
Electronic_ISBN
978-1-4244-1892-3
Type
conf
DOI
10.1109/ISDRS.2007.4422538
Filename
4422538
Link To Document