Design methodologies for the synthesis of high speed multiprocessor digital signal processing systems

Novel, efficient design methodologies are presented for the implementation of dedicated, multiprocessor digital signal processing (DSP) systems for high-speed, real-time applications. Specifically, a design process model consisting of three design phases is described. The first design phase is algorithm transformation, in which the DSP computing algorithms are reformulated and made suitable for parallel implementation. The second design phase is algorithm mapping and array configuration. During this phase, the parallel DSP algorithm is mapped to a systolic array. A multistage mapping procedure is presented. In the third design phase, the individual processing unit is designed. An optimal code-generation method for programming a multiple-DSP array is discussed