DocumentCode :
2661707
Title :
An efficient VLSI implementation of real-time Kalman filter
Author :
Rao, Padma ; Bayoumi, Magdy A.
Author_Institution :
Center for Adv. Comput. Studies, Univ. of South Western Louisiana, Lafayette, LA, USA
fYear :
1990
fDate :
1-3 May 1990
Firstpage :
2353
Abstract :
An efficient systolic implementation for a real-time Kalman filter is presented. The filter is implemented by propagating the error information matrix. The whole computation for each estimate is done in five processing steps instead of eight by exploiting inherent parallelism in the algorithm. This is achieved by dividing the eight steps into two groups, each of which can be computed simultaneously on a systolic array, thereby reducing the total computation time by 40%. Each processing step follows a modified Faddeev´s algorithm which is implemented on a bitrapezoidal array. Using a bitrapezoidal array doubles the throughput obtained by a single trapezoidal array. Techniques used for data skewing and storage organization are efficient, thus reducing the silicon area and complexity of control, and increasing the speed of computation
Keywords :
Kalman filters; VLSI; digital filters; digital signal processing chips; filtering and prediction theory; parallel algorithms; real-time systems; systolic arrays; DSP; VLSI implementation; bitrapezoidal array; data skewing; error information matrix; modified Faddeev´s algorithm; real-time Kalman filter; storage organization; systolic implementation; Control systems; Covariance matrix; Equations; Filtering; Kalman filters; Matrix decomposition; Signal processing algorithms; Silicon; Systolic arrays; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1990., IEEE International Symposium on
Conference_Location :
New Orleans, LA
Type :
conf
DOI :
10.1109/ISCAS.1990.112482
Filename :
112482
Link To Document :
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