Leakage effect suppression in charge pumping measurement and stress-induced traps in high-k Gated MOSFETs

High-k material has been proposed to replace the conventional silicon dioxide (SiO₂) as gate dielectrics of MOS devices. However, the quantity and extent of charge trapping in the high-k dielectric strongly affect the electrical characteristics of high-k gated MOS devices. Charge pumping (CP) technique is well known to be a very efficient tool to study the interface traps and border traps of MOS devices with high-k gate dielectrics. Yet, the gate leakage current is the main problem as the CP technique is applied to measure a thin high-k gated MOS device. In this work, a simple method is proposed to separate the CP current from the parasitic tunneling component in MOS devices with thin high-k gate dielectric.