Title :
Nimbus: An integrated display chip
Author :
Locanthi, Bart ; McLellan, Rae
Author_Institution :
AT&T Bell Lab., Murray Hill, NJ, USA
Abstract :
With SRAM technology delivering more than a million bits per chip, it is now feasible to integrate display memory with display control. The circuit described contains a two-port SRAM array, one port being serial access combined with duty cycle modulation for gray-scale display on LCDs. The memory array itself is synchronous with the processor port, providing low-latency, high-bandwidth access for image manipulation
Keywords :
CMOS integrated circuits; SRAM chips; application specific integrated circuits; display devices; 1.2 Mbit; CMOS; LCD; LCDs; Nimbus; display control; duty cycle modulation; gray-scale display; integrated display chip; serial access; two-port SRAM array; Bandwidth; Computer architecture; Control systems; Delay; Integrated circuit technology; Liquid crystal displays; Memory management; Random access memory; System buses; Voltage;
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1991. ICCD '91. Proceedings, 1991 IEEE International Conference on
Conference_Location :
Cambridge, MA
Print_ISBN :
0-8186-2270-9
DOI :
10.1109/ICCD.1991.139993
