Fault tolerance analysis of MEMS holographic memory for DORGAs

Author

Seto, Daisaku ; Watanabe, Minoru

Author_Institution

Electr. & Electron. Eng., Shizuoka Univ., Shizuoka, Japan

fYear

2009

fDate

9-11 Nov. 2009

Firstpage

33

Lastpage

37

Abstract

Demand for fast dynamic reconfiguration has increased since dynamic reconfiguration can accelerate the performance of implementation circuits on its programmable gate array. Such dynamic reconfiguration is dependent upon two important features: fast reconfiguration and numerous contexts. However, fast reconfiguration and numerous contexts share a tradeoff relation on current VLSIs. Therefore, optically reconfigurable gate arrays (ORGAs) have been developed to resolve this dilemma. Among studies of such devices, this paper presents a demonstration of a dynamic ORGA (DORGA) with a MEMS holographic memory and its fault tolerance analysis results.

Keywords

VLSI; fault tolerant computing; holographic storage; programmable logic arrays; reconfigurable architectures; DORGA; MEMS holographic memory; VLSI; dynamic optically reconfigurable gate arrays; fault tolerance analysis; programmable gate array; Circuits; Fault tolerance; Holographic optical components; Holography; Micromechanical devices; Mirrors; Optical arrays; Optical devices; Photodiodes; Semiconductor laser arrays;

fLanguage

English

Publisher

ieee

Conference_Titel

Micro-NanoMechatronics and Human Science, 2009. MHS 2009. International Symposium on

Conference_Location

Nagoya

Print_ISBN

978-1-4244-5094-7

Electronic_ISBN

978-1-4244-5095-4

Type

conf

DOI

10.1109/MHS.2009.5352102

Filename

5352102