Title :
An Asynchronous Divider Implementation
Author :
Jamadagni, Navaneeth ; Ebergen, Jo
Author_Institution :
Maseeh Coll. of Comput. Sci. & Eng., Portland State Univ., Portland, OR, USA
Abstract :
We present an asynchronous implementation of a novel division algorithm previously patented. Our implementation exploits the average-case behavior of the algorithm and uses the versatility of GasP circuits to implement the data-dependent latencies in the algorithm. On average, the delay per quotient bit for our implementation is 6.3 FO4 gate delays compared to 9.5 FO4 gate delays for a similar SRT divider implementation.
Keywords :
asynchronous circuits; dividing circuits; FO4 gate delays; GasP circuits; SRT divider; asynchronous divider; average-case behavior; data-dependent latency; division algorithm; Algorithm design and analysis; Approximation algorithms; Delay; Multiplexing; Radiation detectors; Registers; Wires; Asynchronous Divider; Division Algorithm H; GasP; Variable Latency;
Conference_Titel :
Asynchronous Circuits and Systems (ASYNC), 2012 18th IEEE International Symposium on
Conference_Location :
Lyngby
Print_ISBN :
978-1-4673-1360-5
DOI :
10.1109/ASYNC.2012.17
