Title :
A 4.6-GHz, 15-mW frequency synthesizer CMOS ASIC with milli-hertz frequency resolution for miniature atomic clocks
Author :
Zhao, Yazhou ; Tanner, Steve ; Farine, Pierre-André ; Casagrande, Arnaud
Author_Institution :
Electron. & Signal Process. Lab., EPFL, Neuchatel, Switzerland
Abstract :
In this paper, a 4.6 GHz frequency synthesizer integrated circuit for Cesium-based miniature atomic clocks is presented. Based on a fractional-N phase-locked loop (PLL) with sigma-delta modulator, the chip features a frequency resolution below 10-3 Hz at its output, allowing a tuning resolution of 10-13. This value was measured on the circuit which is integrated into a 130 nm CMOS process. It consumes 15 mW, features an output phase noise of -76 dBc/Hz @ 1 kHz offset from the 4.6 GHz carrier, and provides a programmable output power from -10 to 0 dBm.
Keywords :
CMOS integrated circuits; application specific integrated circuits; atomic clocks; caesium; frequency synthesizers; phase locked loops; sigma-delta modulation; voltage-controlled oscillators; CMOS ASIC; Cs; PLL; frequency 4.6 GHz; frequency synthesizer; miniature atomic clocks; phase locked loop; power 15 mW; sigma-delta modulator; size 130 nm; Atomic clocks; Frequency measurement; Frequency synthesizers; Phase locked loops; Phase noise; Voltage-controlled oscillators;
Conference_Titel :
Frequency Control and the European Frequency and Time Forum (FCS), 2011 Joint Conference of the IEEE International
Conference_Location :
San Fransisco, CA
Print_ISBN :
978-1-61284-111-3
DOI :
10.1109/FCS.2011.5977730
