Fast-settling low-power two-stage self-biased CMOS amplifier using feedforward-regulated cascode devices

A fast-settling two-stage completely self-biased amplifier (op amp) is presented. The op amp uses two amplifying stages and feedforward-regulated cascode transistors to achieve high dc gain, while maintaining a reasonable output swing and high-frequency performance. Exhaustive simulation results over corners demonstrate that, after proper time-domain optimization of the proposed op amp in a 0.13-μm CMOS technology, a very fast settling with accuracy over 12 bits can be achieved, while dissipating very low power.