• DocumentCode
    2665329
  • Title

    Development of chip model library for the computer-aided analysis of electronic packages

  • Author

    Pratapneni, S.N. ; Wolff, C.M. ; Hsu, P. ; Rozenblit, J.W. ; Prince, J.L.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Arizona Univ., Tucson, AZ, USA
  • fYear
    1993
  • fDate
    4-6 Oct 1993
  • Firstpage
    417
  • Lastpage
    422
  • Abstract
    The development of a chip model library for the complete design and simulation of multichip assemblies is discussed. The simulation of the driver/receiver part of the chips mounted in multichip modules (MCMs) can be done using a variety of models at varying levels of complexity. A hierarchy is used to organize the models for use with an intelligent model selection tool. Model selection is based on the tradeoff between accuracy and speed. The four models considered are device, table-based equation-based and simple RC models. The basic RC model, a physical model, considers transistor on-resistance and load capacitance as a complete representation of the driver circuit. The table lookup approach stores a detailed transfer function of device operation or circuit operation in a table using a device level circuit simulator. Equation-based models simplify the physical device equations based on the switching behavior of a particular circuit. An integral environment with this group of models is developed with an object-oriented approach. Each of the model templates is treated as an object and it can be repeated as required
  • Keywords
    SPICE; circuit analysis computing; circuit layout CAD; integrated circuit interconnections; integrated circuit layout; integrated circuit modelling; integrated circuit packaging; intelligent design assistants; multichip modules; transfer functions; CAD; MCMs; RC model; SPICE; chip model library; computer-aided analysis; device level circuit simulator; driver/receiver part; electronic packages; equation-based models; integral environment; intelligent model selection tool; load capacitance; model templates; multichip assemblies; object-oriented approach; simulation; table lookup approach; transfer function; transistor on-resistance; Assembly; Capacitance; Computational modeling; Computer aided analysis; Driver circuits; Integral equations; Libraries; Multichip modules; Object oriented modeling; Table lookup;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Manufacturing Technology Symposium, 1993, Fifteenth IEEE/CHMT International
  • Conference_Location
    Santa Clara, CA
  • Print_ISBN
    0-7803-1424-7
  • Type

    conf

  • DOI
    10.1109/IEMT.1993.398172
  • Filename
    398172