DocumentCode :
2665351
Title :
A FPGA implementation of low-complexity noise removal
Author :
Matsubara, Takeaki ; Moshnyaga, Vasily G. ; Hashimoto, Koji
Author_Institution :
Dept. of Electron. Eng. Comput. Sci., Fukuoka Univ., Fukuoka, Japan
fYear :
2010
fDate :
12-15 Dec. 2010
Firstpage :
255
Lastpage :
258
Abstract :
Impulse noise removal is a very important preprocessing operation in many computer vision applications. This paper presents a low-complexity noise removal based on a conditional technique and outlines its FPGA implementation for window sizes of (3×3) and (5×5). As the experiments show, the proposed technique performs significantly better than standard median filter and achieves superior image quality. The FPGA implementations are very compact, fast and consume low-power.
Keywords :
computer vision; field programmable gate arrays; image denoising; median filters; FPGA implementation; computer vision; image quality; low-complexity noise removal; median filter; Clocks; Noise; Pixel; FPGA implementation; Impulse noise; image processing; median filter;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics, Circuits, and Systems (ICECS), 2010 17th IEEE International Conference on
Conference_Location :
Athens
Print_ISBN :
978-1-4244-8155-2
Type :
conf
DOI :
10.1109/ICECS.2010.5724502
Filename :
5724502
Link To Document :
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