• DocumentCode
    2665363
  • Title

    Handling reconvergent paths using conditional probabilities in combinatorial logic netlist reliability estimation

  • Author

    Flaquer, Josep Torras ; Daveau, Jean-Marc ; Naviner, L. ; Roche, Philippe

  • Author_Institution
    STMicroelectronics, Crolles, France
  • fYear
    2010
  • fDate
    12-15 Dec. 2010
  • Firstpage
    263
  • Lastpage
    267
  • Abstract
    Reliability analysis, SET and SER estimation in combinatorial logic circuits rely on various techniques ranging from SPICE simulation to probabilistic error propagation models. Signal correlations are known to be a source of error in many approaches. Such correlations are created between signals on different branches of a reconvergent path. We propose in this paper to use conditioned probabilities to handle such correlation and show that it allows achieving a correct result.
  • Keywords
    SPICE; circuit reliability; combinational circuits; error statistics; estimation theory; probability; SER estimation; SET estimation; SPICE simulation; combinatorial logic circuit; combinatorial logic netlist reliability estimation; conditional probability; probabilistic error propagation models; reconvergent path; signal correlation; Bismuth; Correlation; Logic gates; circuit reliability; logic design; probability; reliability estimation;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics, Circuits, and Systems (ICECS), 2010 17th IEEE International Conference on
  • Conference_Location
    Athens
  • Print_ISBN
    978-1-4244-8155-2
  • Type

    conf

  • DOI
    10.1109/ICECS.2010.5724504
  • Filename
    5724504