Hardware implementation of fast forwarding engine using standard memory and dedicated circuit

Ternary content addressable memory (TCAM) is becoming very popular for designing high-throughput forwarding engines on routers. However, TCAM has potential problems in terms of cost of hardware and cost of power, which limits it deploying large amounts of capacity. In this paper, we propose a new hardware architecture for a fast forwarding engine that fundamentally solves the potential problems of TCAM. We also develop a hardware design for our architecture. Our results show that the proposed hardware reduces the costs of hardware resources needed and power consumption into 62% and 52%, respectively.