Pave Pillar in-house research [avionics]

The concepts and technologies required to develop, integrate, and test the Pave Pillar architecture in an avionics system are considered. An in-house research team was formed at the Wright-Patterson Development Center Avionics Laboratory to demonstrate and evaluate architectural and Ada software concepts that relate to modular avionics. The architectural concepts related to line replaceable modules are as defined by the architecture specification for Pave Pillar avionics. The hardware and software issues relating to multiprocessing, multitasking, and real-time reconfiguration are discussed. The integration issues of developing and testing the VHSIC avionic modular processors (VAMPs), high-speed data bus networks, and Ada software are examined. An avionic hot bench simulation was integrated to provide a closed-loop real-time test bed called the integrated test bed (ITB) facility. The configuration and test setup for the avionic modules were selected to provide a realistic environment. There are four VAMP clusters with each cluster consisting of two high-speed data bus modules, two to four Mil-Standard 1750A CPU modules, and one Mil-Standard 1553B bus module. The results from this testing prove the concept of common modules and modular avionics while quantifying the integration issues