Digital cartesian feedback linearization of switched mode power amplifiers

Author

Viteri, Alejandro ; Zjajo, Amir ; Hamoen, Thijmen ; Van der Meijs, Nick

Author_Institution

Delft Univ. of Technol., Delft, Netherlands

fYear

2010

fDate

12-15 Dec. 2010

Firstpage

890

Lastpage

893

Abstract

The efficient use of the power budget in small satellite applications is of primary importance because of the reduced size of the power sources. Unfortunately, high efficiency in power amplifiers (PA) is strongly related to non-linearities and hence distortion. In this paper a digital architecture for the linearization of switched mode PAs is proposed, and a circuit to detect the phase shift and the CORDIC algorithm to correct that phase as well as to compute the magnitude are developed. The results show that linearity is improved by 20 dB for a system with a bandwidth of 9.6 kHz for a loop gain of 10 and 400 ns of system delay. The circuit, synthesized in a FPGA consumes a total of 33.3 mW.

Keywords

digital arithmetic; field programmable gate arrays; linearisation techniques; network synthesis; power amplifiers; switched networks; CORDIC algorithm; FPGA; bandwidth 9.6 kHz; circuit synthesis; digital architecture; digital cartesian feedback linearization; phase shift detection; power 33.3 mW; satellite applications; switched mode power amplifiers; time 400 ns; Bismuth; Clocks; Delay; Neodymium; Phase distortion; Switched-mode power supply; CORDIC; Cartesian feedback; linearization; phase alignment;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics, Circuits, and Systems (ICECS), 2010 17th IEEE International Conference on

Conference_Location

Athens

Print_ISBN

978-1-4244-8155-2

Type

conf

DOI

10.1109/ICECS.2010.5724655

Filename

5724655