Low leakage multi-Vth technique for sequential circuits at transistor level in nanotechnology

Leakage power is the main dominant source of power dissipation for Sub-100nm VLSI circuits. Various techniques were proposed to reduce the leakage power dissipation; one of these techniques is Multi-Threshold voltage. In this paper, the exact and optimal values of Threshold Voltage (V_th) for each transistor of the design are found for any sequential circuit. This is achieved by applying Artificial Intelligence (AI) Search Algorithm to find the optimum values that get the largest reduction of leakage current. The proposed algorithm exploits the total Slack Time of each transistor´s location and their contribution of leakage current. The proposed algorithm is introduced by AI Heuristic Search, under 22nm BSIM4 foundries predictive model. The proposed approach saves around 80% of the Sub-threshold Leakage current without degrading the performance of the circuit.