Optimal Buffering Resources Allocation of On-Chip Networks with Finite Buffers

A novel buffer allocation algorithm for deterministically-routed and wormhole-switched network-on-chip (NoC) with finite size buffers is proposed. Based on a analytical model, the algorithm can assess the performance bottleneck of all the NoC routers. When the total buffer budget is fixed, according to the traffic characteristics of the target application, the proposed algorithm automatically allocates the buffer depth for each input channel in different routers. The simulation results show that, by using the proposed algorithm, better system performance and lower average packet latency can be achieved compared to the uniform assignment of buffering resources which has been widely adopted in current NoC design.