DocumentCode :
2669100
Title :
Estimation of test metrics for multiple analogue parametric deviations
Author :
Bounceur, Ahcène ; Mir, Salvador ; Simeu, Emmanuel ; Rolíndez, Luis
Author_Institution :
TIMA Lab., RMS Group, Grenoble
fYear :
2006
fDate :
5-7 Sept. 2006
Firstpage :
234
Lastpage :
239
Abstract :
The estimation of test metrics such as defect level, test yield or yield loss is important in order to quantify the quality and cost of a test approach. In the analogue domain, previous works have considered the estimation of these metrics for the case of single faults, either catastrophic or parametric. The consideration of single parametric faults is sensible for a production test technique if the design is robust. However, in the case that production test limits are tight, test escapes resulting from multiple parametric deviations become important. In addition, aging mechanisms result in field failures that are often caused by multiple parametric deviations. In this paper, we present a statistical technique for estimating test metrics for the case of multiple analogue parametric deviations, requiring a Monte Carlo simulation of the circuit under test. This technique assumes Gaussian probability density functions (PDFs) for the parameter and performance deviations but the technique can be adapted to other types of PDFs. We will illustrate the technique for the case of testing a fully differential operational amplifier, proving the validity in the case of this circuit of the Gaussian PDF
Keywords :
Monte Carlo methods; analogue integrated circuits; operational amplifiers; statistical analysis; Gaussian probability density functions; Monte Carlo simulation; circuit under test; multiple analogue parametric deviations; operational amplifier testing; statistical techniques; test metrics estimation; Aging; Circuit faults; Circuit testing; Costs; Differential amplifiers; Operational amplifiers; Probability density function; Production; Robustness; Yield estimation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006. International Conference on
Conference_Location :
Tunis
Print_ISBN :
0-7803-9726-6
Type :
conf
DOI :
10.1109/DTIS.2006.1708706
Filename :
1708706
Link To Document :
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