DocumentCode
266918
Title
Design and embodiment of larger quaternary multiplexer and demultiplexer
Author
Ishtiak, Khandakar Mohammad ; Safayat-Al-Imam ; Al Mahmud, Nahyan
Author_Institution
Dept. of Electr. & Electron. Eng., Ahsanullah Univ. of Sci. & Technol., Dhaka, Bangladesh
fYear
2014
fDate
10-12 April 2014
Firstpage
1
Lastpage
5
Abstract
In this work, the implementation of the novel quaternary algebra over the larger quaternary multiplexer and demultiplexer are performed. Both arbitrary multiplexer and demultiplexer are designed using the larger quaternary encoders and decoders respectively. This design validates the quaternary algebra to perform in building larger arbitrary logic blocks using different logic blocks with same principle. The design complexity has been compared with truth table and mathematical formulation under quaternary algebra and found perfect agreement with it.
Keywords
algebra; decoding; demultiplexing equipment; multiplexing equipment; arbitrary demultiplexer; arbitrary logic blocks; arbitrary multiplexer; design complexity; mathematical formulation; quaternary algebra; quaternary decoders; quaternary demultiplexer; quaternary encoders; quaternary multiplexer; truth table; Algebra; Computers; Decoding; Inverters; Logic circuits; Logic gates; Multiplexing; Quaternary multiplexer; building blocks; quaternarydemuliplexer;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Engineering and Information & Communication Technology (ICEEICT), 2014 International Conference on
Conference_Location
Dhaka
Print_ISBN
978-1-4799-4820-8
Type
conf
DOI
10.1109/ICEEICT.2014.6919078
Filename
6919078
Link To Document