• DocumentCode
    2669252
  • Title

    New compact model for performance and process variability assessment in 14nm FDSOI CMOS technology

  • Author

    Denis, Y. ; Monsieur, F. ; Ghibaudo, G. ; Mazurier, J. ; Josse, E. ; Rideau, D. ; Charbuillet, C. ; Tavernier, C. ; Jaouen, H.

  • Author_Institution
    STMicroelectron., Crolles, France
  • fYear
    2015
  • fDate
    23-26 March 2015
  • Firstpage
    59
  • Lastpage
    64
  • Abstract
    This paper provides a compact model for performance and process variability assessment in 14nm FDSOI CMOS technology. It is used to investigate MOS performance relation with process parameters. Then production device within wafer variability has been modeled using backward propagation of variance (BPV). This application allows spotting the main model parameter contributing to the total MOS transistor resistance (Ron) variability.
  • Keywords
    CMOS integrated circuits; integrated circuit modelling; silicon-on-insulator; BPV; FDSOI CMOS technology; MOS transistor resistance variability; backward propagation of variance; performance assessment; process variability assessment; size 14 nm; wafer variability; Carbon; Computational modeling; Epitaxial growth; Hafnium; Logic gates; Semiconductor process modeling; Standards;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microelectronic Test Structures (ICMTS), 2015 International Conference on
  • Conference_Location
    Tempe, AZ
  • ISSN
    1071-9032
  • Print_ISBN
    978-1-4799-8302-5
  • Type

    conf

  • DOI
    10.1109/ICMTS.2015.7106109
  • Filename
    7106109
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2669252