A novel 1V, 24µW, ΣΔ modulator using Amplifier & Comparator Based Switched Capacitor technique, with 10-kHz bandwidth and 64dB SNDR

Author

Ali, Shafqat ; Tanner, Steve ; Farine, Pierre Andre

Author_Institution

Swiss Fed. Inst. of Technol. (EPFL), Lausanne, Switzerland

fYear

2010

fDate

12-15 Dec. 2010

Firstpage

1124

Lastpage

1127

Abstract

A new technique, Amplifier and Comparator Based Switched Capacitor (ACBSC) for low voltage switched cap circuits, is presented. ACBSC combines the recently introduced CBSC (comparator based switched capacitor circuit) with an amplifier. The current sources in ACBSC experience less output voltage swing compared to the ones in CBSC. We apply ACBSC to the design of a 3rd-order sigma delta modulator in a 0.18 μm CMOS process technology, with a bandwidth of 10 kHz. Simulations show that the SDM achieves a peak SNDR of higher than 64 dB and consumes 24 μW from 1 Volt supply.

Keywords

CMOS digital integrated circuits; amplifiers; comparators (circuits); sigma-delta modulation; switched capacitor networks; ΣΔ modulator; 3rd-order sigma delta modulator design; ACBSC; CMOS process technology; SDM simulations; amplifier-comparator-based switched capacitor technique; bandwidth 10 kHz; low-voltage switched cap circuits; power 24 muW; size 0.18 mum; voltage 1 V; CMOS integrated circuits; Converters; MOS devices; Semiconductor device modeling; Signal to noise ratio; Switches; Switching circuits; CBSC; Low voltage design; Sigma delta modulator;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics, Circuits, and Systems (ICECS), 2010 17th IEEE International Conference on

Conference_Location

Athens

Print_ISBN

978-1-4244-8155-2

Type

conf

DOI

10.1109/ICECS.2010.5724714

Filename

5724714