DocumentCode :
2669410
Title :
Embedded flash testing: overview and perspectives
Author :
Ginez, O. ; Daga, J.-M. ; Girard, P. ; Landrault, C. ; Pravossoudovitch, S. ; Virazel, A.
Author_Institution :
Lab. d´´Informatique, de Robotique et de Microelectronique de Montpellier, Univ. de Montpellier II
fYear :
2006
fDate :
5-7 Sept. 2006
Firstpage :
210
Lastpage :
215
Abstract :
The evolution of system-on-chip (SoC) designs involves the development of non-volatile memory technologies like flash. Embedded flash (eFlash) memories are based on the floating-gate transistor concept and can be subject to complex hard defects creating functional faults. In this paper, we present a complete analysis of a particular failure mechanism, referred as disturb phenomenon. Moreover, we analyze the efficiency of a particular test sequence to detect this disturb phenomenon. Finally we conclude on the interest to develop new test infrastructure well adapted to the eFlash environment
Keywords :
embedded systems; failure analysis; fault simulation; flash memories; integrated circuit testing; logic testing; system-on-chip; 2T-FLOTOX core-cell; Fowler-Nordheim tunneling effect; March algorithms; coupling effect; disturb phenomenon; eFlash environment; embedded flash memories; embedded flash testing; failure mechanism; flash memory; floating-gate transistor; functional faults; nonvolatile memory technologies; system-on-chip designs; Failure analysis; Flash memory; Logic testing; Nonvolatile memory; Parallel programming; Random access memory; Tunneling; Uniform resource locators; Variable structure systems; Voltage control;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006. International Conference on
Conference_Location :
Tunis
Print_ISBN :
0-7803-9726-6
Type :
conf
DOI :
10.1109/DTIS.2006.1708721
Filename :
1708721
Link To Document :
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