Title :
On the hardware implementation efficiency of SHA-3 candidates
Author :
Kitsos, Paris ; Sklavos, Nicolas
Author_Institution :
Comput. Sci., Hellenic Open Univ., Patra, Greece
Abstract :
The most well known and officially used hash function is the Secure Hash Algorithm-1 (SHA-1) and Secure Hash Algorithm-2 (SHA-2). In recent years serious attacks have been published against SHA-1. This led the National Institute of Standard and Technology (NIST) to organize an effort to develop a modern and more secure hash algorithms through a hash function competition for usage in the following years in the near future. The selected new hash function will be called SHA-3. This paper deals with the hardware implementation efficiency of SHA-3 candidates, which is one of the most critical issues, regarding the adoption of the SHA-3 standard. Comparisons, in terms of hardware terms are given in detail, through this work.
Keywords :
cryptography; NIST; SHA-3 candidates; hardware implementation efficiency; national institute of standard and technology; secure hash algorithm; Computer architecture; Cryptography; Hardware; Throughput; FPGA; SHA-3; cryptographic hardware; embedded system; system design;
Conference_Titel :
Electronics, Circuits, and Systems (ICECS), 2010 17th IEEE International Conference on
Conference_Location :
Athens
Print_ISBN :
978-1-4244-8155-2
DOI :
10.1109/ICECS.2010.5724743
