Threshold voltage instability in organic TFT with SiO2 and SiO2/parylene-stack dielectrics

Author

Wrachien, Nicola ; Cester, Andrea ; Pinato, Alessandro ; Meneghini, Matteo ; Tazzoli, Augusto ; Meneghesso, Gaudenzio ; Kovac, Jaroslav ; Jakabovic, Jan ; Donoval, Daniel

Author_Institution

Dept. of Inf. Eng., Univ. of Padova, Padova, Italy

fYear

2009

fDate

26-30 April 2009

Firstpage

109

Lastpage

116

Abstract

We study the charge trapping/detrapping kinetics on pentacene-based organic thin-film-transistors featuring SiO₂ and SiO₂/parylene C stack gate insulators. The threshold voltage variation is correlated with the gate pulse width and amplitude, and it is due to charge trapping, rather than permanent degradation. The detrapping kinetics is thermally-activated and it is accelerated if the device is illuminated. The additional parylene layer brings benefits by strongly reducing the charge trapping/detrapping, and increasing the hole mobility and the drain current.

Keywords

dielectric materials; silicon compounds; thin film transistors; SiO₂; charge trapping-detrapping kinetics; drain current; hole mobility; parylene C stack gate insulators; parylene-stack dielectrics; pentacene-based organic thin-film-transistors; threshold voltage instability; Costs; Dielectric substrates; Fabrication; Kinetic theory; Organic semiconductors; Organic thin film transistors; Pentacene; Silicon; Thin film transistors; Threshold voltage; component; hysteresis; organic TFT; parylene; pentacene; traps;

fLanguage

English

Publisher

ieee

Conference_Titel

Reliability Physics Symposium, 2009 IEEE International

Conference_Location

Montreal, QC

ISSN

1541-7026

Print_ISBN

978-1-4244-2888-5

Electronic_ISBN

1541-7026

Type

conf

DOI

10.1109/IRPS.2009.5173234

Filename

5173234