Author :
Nitta, H. ; Kamigaichi, T. ; Arai, F. ; Futatsuyama, T. ; Endo, M. ; Nishihara, N. ; Murata, T. ; Takekida, H. ; Izumi, T. ; Uchida, K. ; Maruyama, T. ; Kawabata, I. ; Suyama, Y. ; Sato, A. ; Ueno, K. ; Takeshita, H. ; Joko, Y. ; Watanabe, S. ; Liu, Y. ;
Abstract :
Three bits per cell NAND Flash Memory Technology for 30 nm and beyond has been successfully developed with floating gate technology. Tight natural Vth distribution, wide program/erase window, and good cell reliability such as program disturb, endurance and data retention are obtained. 8 level Vth distributions are successfully demonstrated.
Keywords :
NAND circuits; flash memories; logic gates; nanoelectronics; reliability; NAND flash memory technology; cell reliability; data retention; floating gate technology; size 30 nm; Dielectric constant; Digital audio players; Digital cameras; Displays; Electrodes; Nonvolatile memory; Silicides; Silicon compounds; Solid state circuits; Space technology;
