DocumentCode :
2670579
Title :
A single-chip video signal processing system with embedded DRAM
Author :
Hilgenstock, Jörg ; Herrmann, Klaus ; Moch, Sören ; Pirsch, Peter
Author_Institution :
Lab. fur Informationstech., Hannover Univ., Germany
fYear :
2000
fDate :
2000
Firstpage :
23
Lastpage :
32
Abstract :
A programmable single-chip multiprocessor system for video signal processing applications has been developed. It integrates four processing nodes with on-chip DRAM and application-specific interfaces. The embedded DRAM is primarily used as a frame buffer and makes external memory for most applications obsolete. For fast access to local data segments a static RAM is also integrated in each processing node. Methods for efficient usage of the integrated memory are discussed and the concept for a MPEG2 video encoder/decoder implementation is presented
Keywords :
DRAM chips; SRAM chips; digital signal processing chips; multiprocessing systems; video codecs; video coding; video signal processing; 0.25 mum; 16 Mbit; MPEG2 video encoder/decoder; application-specific interfaces; embedded DRAM; frame buffer; integrated memory; local data segments; on-chip DRAM; processing nodes; programmable single-chip multiprocessor system; single-chip video signal processing system; static RAM; video coding; Bandwidth; Delay; Image quality; Laboratories; Multiprocessing systems; Random access memory; Read-write memory; Telephony; Video coding; Video signal processing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signal Processing Systems, 2000. SiPS 2000. 2000 IEEE Workshop on
Conference_Location :
Lafayette, LA
ISSN :
1520-6130
Print_ISBN :
0-7803-6488-0
Type :
conf
DOI :
10.1109/SIPS.2000.886700
Filename :
886700
Link To Document :
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