DocumentCode
2670805
Title
Reliability challenges for power devices under active cycling
Author
Kanert, Werner
Author_Institution
Infineon Technol., Neubiberg, Germany
fYear
2009
fDate
26-30 April 2009
Firstpage
409
Lastpage
415
Abstract
Power stages are subject to severe stress due to active cycling, resulting in e.g. fast thermal cycling. While some applications require several hundred millions of cycles under normal operation conditions, ldquodisturbancesrdquo such as short circuit pose additional challenges. These issues are neither addressed by ldquoclassicalrdquo silicon wafer technology qualification nor by standard product qualification procedures. Challenges and limitations in applying the principles of Robustness Validation to these issues are discussed.
Keywords
power MOSFET; semiconductor device reliability; silicon; DMOS; Si; classical silicon wafer technology; double-diffused MOS transistor; normal operation condition; power device active cycling; power device reliability; robustness validation; standard product qualification procedure; Automotive applications; CMOS technology; Circuits; Isolation technology; Qualifications; Robustness; Silicon; Temperature; Thermal stresses; Voltage; Reliability; active cycling; power devices; qualification;
fLanguage
English
Publisher
ieee
Conference_Titel
Reliability Physics Symposium, 2009 IEEE International
Conference_Location
Montreal, QC
ISSN
1541-7026
Print_ISBN
978-1-4244-2888-5
Electronic_ISBN
1541-7026
Type
conf
DOI
10.1109/IRPS.2009.5173288
Filename
5173288
Link To Document