Title :
Improvement of the electrical safe operating area of a DMOS transistor during ESD events
Author :
Podgaynaya, Alevtina ; Pogany, Dionyz ; Gornik, Erich ; Stecher, Matthias
Author_Institution :
IFAG ATV PTP TSP, Infineon Technol., Neubiberg, Germany
Abstract :
Electrical safe operating area (SOA) of double-diffused vertical MOSFETs (VDMOS) in smart power ICs is investigated by simulation and experiments. The influence of the layout of VDMOS cells is analyzed. DMOS transistors with circular/oval cell layout exhibit higher ESD robustness in comparison with conventional stripe cells. The effect is related to better current distribution of circular/oval cell devices. It is also observed that appropriate source/body engineering can improve electrical SOA of a VDMOS as well.
Keywords :
MOS integrated circuits; electrical safety; electrostatic discharge; power integrated circuits; DMOS transistor; ESD event analysis; ESD robustness; VDMOS cells; VDMOS safe operating area; circular-oval cell layout; double-diffused vertical MOSFET; smart power IC; source-body engineering; Bipolar transistors; Body regions; Driver circuits; Electrostatic discharge; Immune system; MOSFETs; Protection; Robustness; Semiconductor optical amplifiers; Voltage; MOS; electrical SOA; power;
Conference_Titel :
Reliability Physics Symposium, 2009 IEEE International
Conference_Location :
Montreal, QC
Print_ISBN :
978-1-4244-2888-5
Electronic_ISBN :
1541-7026
DOI :
10.1109/IRPS.2009.5173293
