DocumentCode :
2671369
Title :
Ring-planarized cylindrical arrays with application to modular multiplication
Author :
Freking, William L. ; Parhi, Keshab K.
Author_Institution :
Minnesota Univ., Minneapolis, MN, USA
fYear :
2000
fDate :
2000
Firstpage :
497
Lastpage :
506
Abstract :
Cylindrical arrays have been shown useful for VLSI implementation of a variety of problems including matrix-matrix multiplication and algebraic path determination. However, spiral feedback paths limit their scalability due to performance degradation in interconnect-delay dominant environments. A previously proposed feedback-pipelining technique can efficiently address this problem when signal paths are non-diametric in the projection direction. However, this method may incur excessive penalties when the latter condition does not hold. A new class of cylindrical array is proposed, the ring-planarized cylindrical array, which overcomes the barrier to efficient, fully-pipelined arrays projected in directions having diametric signal paths. In contrast to standard cylindrical arrays, processors from each cylinder row are distributed along planar ring structures rather than lines. This construction inherently constrains maximum signal path length to a constant, permitting efficient scalability. Application to the cryptographically relevant modular multiplication problem is demonstrated
Keywords :
VLSI; cryptography; digital arithmetic; matrix multiplication; multiplying circuits; pipeline arithmetic; systolic arrays; VLSI implementation; algebraic path determination; cryptographically relevant modular multiplication; diametric signal paths; efficient scalability; feedback-pipelining technique; fully-pipelined arrays; interconnect-delay dominant environments; matrix-matrix multiplication; maximum signal path length; modular multiplication; performance degradation; ring-planarized cylindrical arrays; spiral feedback paths; systolic arrays; Cryptography; Degradation; Delay; Feedback; Matrices; Scalability; Spirals; Systolic arrays; Transmission line matrix methods; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signal Processing Systems, 2000. SiPS 2000. 2000 IEEE Workshop on
Conference_Location :
Lafayette, LA
ISSN :
1520-6130
Print_ISBN :
0-7803-6488-0
Type :
conf
DOI :
10.1109/SIPS.2000.886748
Filename :
886748
Link To Document :
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