Rapid prototyping of parallel architectures using DG2VHDL: recent advancements

DG2VHDL is a tool suite which translates automatically Dependence Graphs (DGs) to high quality, ready to synthesize VHDL models for distributed memory and control processor arrays. In this paper we introduce the Optimizer, a tool recently added to the family for searching efficiently the large space of feasible solutions for optimal linear space and time mapping operators. These operators minimize a cost function provided by the designer while also meeting specified architectural constraints. All permissible linear mappings may be considered including multi-projections. Moreover, we present several added features that enhance the usefulness and flexibility of DG2VHDL. These include: (i) parameterized DG descriptions which allow multi-dimensional DGs of varying size to be explored quickly, (i) arbitrary convex polytope DG shapes that can be described with a single command line, (iii) the ability to define arbitrary non-linear space and time mapping functions