Signal processing in CMOS image sensors

Author

Nair, Raj ; Raj, Kannan

Author_Institution

Intel Corp., USA

fYear

2000

fDate

2000

Firstpage

801

Lastpage

810

Abstract

A CMOS image sensor codenamed EYE2, developed on a standard Intel CMOS process and designed into the Intel 971 Camera Kit, is described. EYE2 converted incident visual images into 10-bit digital data streams for still and video imaging applications. The analog signal processing that is essential to achieving the very high SNR desired is detailed. A fully differential architecture was implemented in order to achieve a desired SNR of 60 dB with known techniques for the minimization of signal degradation. The novel techniques implemented helped to speed up the analog signal path and reduced power consumption in the chip

Keywords

CMOS image sensors; analogue processing circuits; cameras; image processing; low-power electronics; minimisation; power consumption; 10 bit; 10-bit digital data streams; 60 dB; CMOS image sensor; EYE2 image sensor array; Intel 971 Camera Kit; Intel CMOS process; analog signal path speedup; analog signal processing; differential architecture; reduced power consumption; signal degradation minimization; signal-to-noise ratio; still imaging applications; video imaging applications; visual image conversion; CMOS image sensors; CMOS process; Cameras; Code standards; Image converters; Process design; Signal processing; Standards development; Streaming media; Video signal processing;

fLanguage

English

Publisher

ieee

Conference_Titel

Signal Processing Systems, 2000. SiPS 2000. 2000 IEEE Workshop on

Conference_Location

Lafayette, LA

ISSN

1520-6130

Print_ISBN

0-7803-6488-0

Type

conf

DOI

10.1109/SIPS.2000.886778

Filename

886778