Title :
Limits to a Correct Evaluation in RTD-Based Quaternary Inverters
Author :
Núñez, Juan ; Quintana, José M. ; Avedillo, María J.
Author_Institution :
Inst. de Microelectron. de Sevilla, Sevilla
Abstract :
Multiple-valued logic (MVL) circuits are one of the most attractive applications of the mono stable-to-multistable transition logic (MML), and they are on the basis of advanced circuits for communications. However, a proper design is not inherent to the usual MML circuit topologies. This paper analyses the case of an MML quaternary inverter, and determines the relations that circuit representative parameters must verify to obtain a correct behaviour.
Keywords :
invertors; logic circuits; resonant tunnelling diodes; MML circuit topologies; RTD-based quaternary inverters; circuit representative parameters; monostable-to-multistable transition logic; multiple-valued logic circuits; Circuit topology; HEMTs; III-V semiconductor materials; Inverters; Logic circuits; Nanoscale devices; Piecewise linear techniques; Resonant tunneling devices; Temperature; Voltage;
Conference_Titel :
Multiple-Valued Logic, 2007. ISMVL 2007. 37th International Symposium on
Conference_Location :
Oslo
Print_ISBN :
0-7695-2831-7
DOI :
10.1109/ISMVL.2007.30
