DocumentCode
2672317
Title
On properties and implementations of inverting ALSC for use in built-in self-testing
Author
Furuya, Kiyoshi ; Koh, Poh Yong ; McCluskey, Edward J.
Author_Institution
Fac. of Sci. & Eng., Chuo Univ., Tokyo, Japan
fYear
1993
fDate
16-18 Nov 1993
Firstpage
305
Lastpage
310
Abstract
Clockwise inverting sequences of original pseudo-random ones are considered effective for two-pattern testing of CMOS circuits. This paper describes a class of circuits which can generate such sequences and conveniently referred as inverting ALSC (autonomous linear sequential circuit). The simulation results show that inverting ALSC generated sequences have strong dependency on the original cyclic structures and can be completely described using some linear recurrence relations. Relationships between original sequences and their inverting ones are illustrated to exhibit correspondence in terms of cycle sets. Then, the possibility of realizing inverting ALSC by simply inserting inverters between stages is discussed. It is further shown that there is no significant difference between two-pattern test capabilities in an original ALSC and the inverting one
Keywords
CMOS logic circuits; VLSI; built-in self test; design for testability; logic testing; sequential circuits; ALSC; CMOS; autonomous linear sequential circuit; built-in self-testing; clockwise inverting sequences; cyclic structures; inverters; linear recurrence relations; pseudorandom sequences; simulation; two-pattern testing; Automatic testing; Built-in self-test; Circuit faults; Circuit simulation; Circuit testing; Clocks; Laboratories; Logic testing; Sequential circuits; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Symposium, 1993., Proceedings of the Second Asian
Conference_Location
Beijing
Print_ISBN
0-8186-3930-X
Type
conf
DOI
10.1109/ATS.1993.398822
Filename
398822
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