DocumentCode
2672540
Title
Direct Digital Frequency Synthesis implemented on a FPGA chip
Author
Grama, Alin ; Muntean, Gabriel
Author_Institution
Tech. Univ. of Cluj-Napoca, Cluj-Napoca
fYear
2006
fDate
10-14 May 2006
Firstpage
92
Lastpage
97
Abstract
In applications where very precisely frequencies and fast switching speed are required the best solution consists in a DDFS circuit. This solution is very attractive in all digital systems because this architecture can provide fast tuning speed and coherent phase. In this paper a direct digital frequency synthesizer implemented on a FPGA (field programmable gate array) chip is presented. Comparatively with other component types (e.g. microprocessor), FPGA chips permit higher speeds for specific applications. The architecture used for DDFS circuit is a classic DDFS, described in the first paragraph of this paper, and short reports of the implementation are presented to underline the advantages of FPGA. This kind of circuit is easy to be implemented on a programmable gate array, and uses only a few resources of the device.
Keywords
circuit tuning; direct digital synthesis; field programmable gate arrays; DDFS circuit; FPGA chip; direct digital frequency synthesis; direct digital frequency synthesizer; field programmable gate array chip; Circuits; Clocks; Field programmable gate arrays; Frequency control; Frequency conversion; Frequency synthesizers; Latches; Read only memory; Registers; Switches;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics Technology, 2006. ISSE '06. 29th International Spring Seminar on
Conference_Location
St. Marienthal
Print_ISBN
1-4244-0551-3
Electronic_ISBN
1-4244-0551-3
Type
conf
DOI
10.1109/ISSE.2006.365365
Filename
4216005
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