Theoretical approach and precise description of PBTI in high-k gate dielectrics based on electron trap in pre-existing and stress-induced defects

We have theoretically analyzed the mechanism of PBTI degradation of high-k gate dielectrics. We proposed a PBTI degradation model based on a comprehensive physical theory using the general notation of gate leakage current and adequate trap distribution. Furthermore, by taking account not only pre-existing but also stress-induced defects, our model could explain the experimental data with high accuracy even though it was very simple. In addition, we have clarified that defect generation rate and/or capture cross-section in HfSiON is different from that in HfLaSiON.